BibTeX record conf/iscas/ChaeWN17

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@inproceedings{DBLP:conf/iscas/ChaeWN17,
  author       = {Moo Sung Chae and
                  Tom Wilson and
                  Eric Naviasky},
  title        = {Multi-standard low-power {DDR} {I/O} circuit design in 7nm {CMOS}
                  process},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017,
                  Baltimore, MD, USA, May 28-31, 2017},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISCAS.2017.8050331},
  doi          = {10.1109/ISCAS.2017.8050331},
  timestamp    = {Thu, 11 Nov 2021 08:50:30 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/ChaeWN17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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