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BibTeX record conf/iscas/ChenLT10
@inproceedings{DBLP:conf/iscas/ChenLT10, author = {Jianwei Chen and Hongchin Lin and Yun{-}Ching Tang}, title = {Efficient high-throughput architectures for high-speed parallel scramblers}, booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May 30 - June 2, 2010, Paris, France}, pages = {441--444}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ISCAS.2010.5537678}, doi = {10.1109/ISCAS.2010.5537678}, timestamp = {Sun, 02 Oct 2022 16:09:21 +0200}, biburl = {https://dblp.org/rec/conf/iscas/ChenLT10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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