BibTeX record conf/iscas/GiesBM05

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@inproceedings{DBLP:conf/iscas/GiesBM05,
  author       = {Valentin Gies and
                  Thierry M. Bernard and
                  Alain M{\'{e}}rigot},
  title        = {Hardware reduction using a 6-connectivity interconnection network
                  over a 4-connectivity {VLSI} asynchronous array processor},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {2227--2230},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465065},
  doi          = {10.1109/ISCAS.2005.1465065},
  timestamp    = {Sun, 25 Oct 2020 23:14:35 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/GiesBM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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