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BibTeX record conf/iscas/PandeyDMG08
@inproceedings{DBLP:conf/iscas/PandeyDMG08, author = {Sujan Pandey and Rolf Drechsler and Tudor Murgan and Manfred Glesner}, title = {Process variations aware robust on-chip bus architecture synthesis for MPSoCs}, booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}}, pages = {2989--2992}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ISCAS.2008.4542086}, doi = {10.1109/ISCAS.2008.4542086}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/PandeyDMG08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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