BibTeX record conf/isqed/HuangPYRN16

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@inproceedings{DBLP:conf/isqed/HuangPYRN16,
  author       = {Victor Huang and
                  Chenyun Pan and
                  Dmitry Yakimets and
                  Praveen Raghavan and
                  Azad Naeemi},
  title        = {Device/system performance modeling of stacked lateral {NWFET} logic},
  booktitle    = {17th International Symposium on Quality Electronic Design, {ISQED}
                  2016, Santa Clara, CA, USA, March 15-16, 2016},
  pages        = {215--220},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISQED.2016.7479203},
  doi          = {10.1109/ISQED.2016.7479203},
  timestamp    = {Thu, 14 Oct 2021 10:16:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/HuangPYRN16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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