BibTeX record conf/isscc/ChangCCSCFLLHLL17

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@inproceedings{DBLP:conf/isscc/ChangCCSCFLLHLL17,
  author       = {Jonathan Chang and
                  Yen{-}Huei Chen and
                  Wei{-}Min Chan and
                  Sahil Preet Singh and
                  Hank Cheng and
                  Hidehiro Fujiwara and
                  Jih{-}Yu Lin and
                  Kao{-}Cheng Lin and
                  John Hung and
                  Robin Lee and
                  Hung{-}Jen Liao and
                  Jhon{-}Jhy Liaw and
                  Quincy Li and
                  Chih{-}Yung Lin and
                  Mu{-}Chi Chiang and
                  Shien{-}Yang Wu},
  title        = {12.1 {A} 7nm 256Mb {SRAM} in high-k metal-gate FinFET technology with
                  write-assist circuitry for low-VMIN applications},
  booktitle    = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2017, San Francisco, CA, USA, February 5-9, 2017},
  pages        = {206--207},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISSCC.2017.7870333},
  doi          = {10.1109/ISSCC.2017.7870333},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChangCCSCFLLHLL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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