BibTeX record conf/isscc/HoC18a

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@inproceedings{DBLP:conf/isscc/HoC18a,
  author       = {Cheng{-}Ru Ho and
                  Mike Shuo{-}Wei Chen},
  title        = {A fractional-N digital {PLL} with background-dither-noise-cancellation
                  loop achieving {\textless}-62.5dBc worst-case near-carrier fractional
                  spurs in 65nm {CMOS}},
  booktitle    = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2018, San Francisco, CA, USA, February 11-15, 2018},
  pages        = {394--396},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISSCC.2018.8310350},
  doi          = {10.1109/ISSCC.2018.8310350},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/HoC18a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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