BibTeX record conf/isvlsi/WilleZD11

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@inproceedings{DBLP:conf/isvlsi/WilleZD11,
  author       = {Robert Wille and
                  Hongyan Zhang and
                  Rolf Drechsler},
  title        = {{ATPG} for Reversible Circuits Using Simulation, Boolean Satisfiability,
                  and Pseudo Boolean Optimization},
  booktitle    = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2011, 4-6
                  July 2011, Chennai, India},
  pages        = {120--125},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISVLSI.2011.77},
  doi          = {10.1109/ISVLSI.2011.77},
  timestamp    = {Fri, 24 Mar 2023 00:02:41 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/WilleZD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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