BibTeX record conf/sii/MingprukLK16

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@inproceedings{DBLP:conf/sii/MingprukLK16,
  author       = {Nattapong Mingpruk and
                  Uthen Leeton and
                  Thanatchai Kulworawanichpong},
  title        = {Modeling and simulation of voltage unbalance in {AC} electric railway
                  systems using MATLAB/Simulink},
  booktitle    = {2016 {IEEE/SICE} International Symposium on System Integration, {SII}
                  2016, Sapporo, Japan, December 13-15, 2016},
  pages        = {13--18},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SII.2016.7843968},
  doi          = {10.1109/SII.2016.7843968},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/sii/MingprukLK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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