BibTeX record conf/vlsi/JiangDY06a

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@inproceedings{DBLP:conf/vlsi/JiangDY06a,
  author       = {Shan Jiang and
                  Manh Anh Do and
                  Kiat Seng Yeo},
  editor       = {Giovanni De Micheli and
                  Salvador Mir and
                  Ricardo Reis},
  title        = {A {CMOS} Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs},
  booktitle    = {VLSI-SoC: Research Trends in {VLSI} and Systems on Chip - Fourteenth
                  International Conference on Very Large Scale Integration of System
                  on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France},
  series       = {{IFIP}},
  volume       = {249},
  pages        = {81--99},
  publisher    = {Springer},
  year         = {2006},
  url          = {https://doi.org/10.1007/978-0-387-74909-9\_6},
  doi          = {10.1007/978-0-387-74909-9\_6},
  timestamp    = {Sun, 25 Jul 2021 11:51:38 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/JiangDY06a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}