BibTeX record journals/ieicet/KohiraT07

download as .bib file

@article{DBLP:journals/ieicet/KohiraT07,
  author       = {Yukihide Kohira and
                  Atsushi Takahashi},
  title        = {Gate-Level Register Relocation in Generalized Synchronous Framework
                  for Clock Period Minimization},
  journal      = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume       = {90-A},
  number       = {4},
  pages        = {800--807},
  year         = {2007},
  url          = {https://doi.org/10.1093/ietfec/e90-a.4.800},
  doi          = {10.1093/IETFEC/E90-A.4.800},
  timestamp    = {Mon, 01 May 2023 13:02:17 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/KohiraT07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.