BibTeX record journals/tc/YavitsMG15

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@article{DBLP:journals/tc/YavitsMG15,
  author       = {Leonid Yavits and
                  Amir Morad and
                  Ran Ginosar},
  title        = {Computer Architecture with Associative Processor Replacing Last-Level
                  Cache and {SIMD} Accelerator},
  journal      = {{IEEE} Trans. Computers},
  volume       = {64},
  number       = {2},
  pages        = {368--381},
  year         = {2015},
  url          = {https://doi.org/10.1109/TC.2013.220},
  doi          = {10.1109/TC.2013.220},
  timestamp    = {Sat, 20 May 2017 00:24:27 +0200},
  biburl       = {https://dblp.org/rec/journals/tc/YavitsMG15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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