BibTeX record journals/tcad/DagenaisGR92

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@article{DBLP:journals/tcad/DagenaisGR92,
  author       = {Michel R. Dagenais and
                  Serge Gaiotti and
                  Nicholas C. Rumin},
  title        = {Transistor-level estimation of worst-case delays in {MOS} {VLSI} circuits},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {11},
  number       = {3},
  pages        = {384--395},
  year         = {1992},
  url          = {https://doi.org/10.1109/43.124425},
  doi          = {10.1109/43.124425},
  timestamp    = {Mon, 13 Jun 2022 15:38:02 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/DagenaisGR92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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