BibTeX record journals/tcad/HaqueE18

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@article{DBLP:journals/tcad/HaqueE18,
  author       = {Mohammad Shihabul Haque and
                  Arvind Easwaran},
  title        = {Predictability and Performance Aware Replacement Policy {PVISAM} for
                  Unified Shared Caches in Real-time Multicores},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {37},
  number       = {11},
  pages        = {2720--2731},
  year         = {2018},
  url          = {https://doi.org/10.1109/TCAD.2018.2857081},
  doi          = {10.1109/TCAD.2018.2857081},
  timestamp    = {Thu, 24 Sep 2020 11:27:37 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/HaqueE18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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