BibTeX record journals/tvlsi/HuangSLLX14

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@article{DBLP:journals/tvlsi/HuangSLLX14,
  author       = {Yazhi Huang and
                  Liang Shi and
                  Jianhua Li and
                  Qing'an Li and
                  Chun Jason Xue},
  title        = {WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded
                  Systems With Clustered {VLIW} Architecture},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {22},
  number       = {1},
  pages        = {168--180},
  year         = {2014},
  url          = {https://doi.org/10.1109/TVLSI.2012.2236114},
  doi          = {10.1109/TVLSI.2012.2236114},
  timestamp    = {Mon, 07 Mar 2022 15:02:50 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/HuangSLLX14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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