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BibTeX record journals/tvlsi/YuB10
@article{DBLP:journals/tvlsi/YuB10, author = {Zhiyi Yu and Bevan M. Baas}, title = {A Low-Area Multi-Link Interconnect Architecture for {GALS} Chip Multiprocessors}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {18}, number = {5}, pages = {750--762}, year = {2010}, url = {https://doi.org/10.1109/TVLSI.2009.2017912}, doi = {10.1109/TVLSI.2009.2017912}, timestamp = {Wed, 11 Mar 2020 18:18:53 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/YuB10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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