"Electrical modeling of Through Silicon and Package Vias."

Tapobrata Bandyopadhyay et al. (2009)

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DOI: 10.1109/3DIC.2009.5306542

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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  - https://dblp.org/rec/conf/3dic/BandyopadhyayCCST09
Tapobrata Bandyopadhyay, Ritwik Chatterjee, Daehyun Chung, Madhavan Swaminathan, Rao R. Tummala:
Electrical modeling of Through Silicon and Package Vias. 3DIC 2009: 1-8

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