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"High Speed VLSI Architecture for Finding the First W Maximum/Minimum Values."

Guoping Xiao et al. (2014)

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DOI: 10.1007/978-3-319-20227-3_5

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

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  dblp key:
  - conf/applepies/XiaoAZRC14
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  - https://dblp.org/rec/conf/applepies/XiaoAZRC14
Guoping Xiao, Waqar Ahmad, Syed Azhar Ali Zaidi, Massimo Ruo Roch, Giovanni Causapruno:
High Speed VLSI Architecture for Finding the First W Maximum/Minimum Values. ApplePies 2014: 35-41

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