"Minimizing leakage power in aging-bounded high-level synthesis with design ..."

Yibo Chen et al. (2010)

> Home

Details and statistics

DOI: 10.1109/ASPDAC.2010.5419799

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-01

- view
  authority control:
- export record
  dblp key:
  - conf/aspdac/ChenXWT10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aspdac/ChenXWT10
Yibo Chen, Yuan Xie, Yu Wang, Andrés Takach:
Minimizing leakage power in aging-bounded high-level synthesis with design time multi-V_th assignment. ASP-DAC 2010: 689-694

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.