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"A novel si-tunnel FET based SRAM design for ultra low-power 0.3V ..."

Jawar Singh et al. (2010)

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DOI: 10.1109/ASPDAC.2010.5419897

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  - https://dblp.org/rec/conf/aspdac/SinghRMDVP10
Jawar Singh, Krishnan Ramakrishnan, Saurabh Mookerjea, Suman Datta, Narayanan Vijaykrishnan, Dhiraj K. Pradhan:
A novel si-tunnel FET based SRAM design for ultra low-power 0.3V V_DD applications. ASP-DAC 2010: 181-186

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