"Systematic architecture exploration based on optimistic cycle estimation ..."

Ittetsu Taniguchi et al. (2009)

> Home

Details and statistics

DOI: 10.1109/ASPDAC.2009.4796521

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

- view
  authority control:
- export record
  dblp key:
  - conf/aspdac/TaniguchiJRCSTI09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aspdac/TaniguchiJRCSTI09
Ittetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai:
Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processors. ASP-DAC 2009: 449-454

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.