"A full-synthesizable high-precision built-in delay time measurement circuit."

Ming-Chien Tsai, Ching-Hwa Cheng (2009)

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DOI: 10.1109/ASPDAC.2009.4796463

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  - https://dblp.org/rec/conf/aspdac/TsaiC09
Ming-Chien Tsai, Ching-Hwa Cheng:
A full-synthesizable high-precision built-in delay time measurement circuit. ASP-DAC 2009: 123-124

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