"Design of High-Performance Power-Aware Asynchronous Pipelined Circuits in ..."

Tin Wai Kwan, Maitham Shams (2005)

> Home

Details and statistics

DOI: 10.1109/ASYNC.2005.19

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

- view
  authority control:
- export record
  dblp key:
  - conf/async/KwanS05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/async/KwanS05
Tin Wai Kwan, Maitham Shams:
Design of High-Performance Power-Aware Asynchronous Pipelined Circuits in MOS Current Mode Logic. ASYNC 2005: 23-32

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.