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"FazyRV: Closing the Gap between 32-Bit and Bit-Serial RISC-V Cores with a ..."
Meinhard Kissich, Marcel Baunach (2024)
- Meinhard Kissich, Marcel Baunach:
FazyRV: Closing the Gap between 32-Bit and Bit-Serial RISC-V Cores with a Scalable Implementation. CF 2024
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