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"An approach to Verilog-VHDL interoperability for synchronous designs."
Dominique Borrione, F. Vestman, H. Bouamama (1997)
- Dominique Borrione, F. Vestman, H. Bouamama:
An approach to Verilog-VHDL interoperability for synchronous designs. CHARME 1997: 65-87
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