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"A 4-40 Gb/s PAM4 transmitter with output linearity optimization in 65 nm CMOS."

Xuqiang Zheng et al. (2017)

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DOI: 10.1109/CICC.2017.7993640

access: closed

type: Conference or Workshop Paper

metadata version: 2020-08-27

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  - conf/cicc/ZhengZLZYWLJW17
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  - https://dblp.org/rec/conf/cicc/ZhengZLZYWLJW17
Xuqiang Zheng, Chun Zhang, Fangxu Lv, Feng Zhao, Shigang Yue, Ziqiang Wang, Fule Li, Hanjun Jiang, Zhihua Wang:
A 4-40 Gb/s PAM4 transmitter with output linearity optimization in 65 nm CMOS. CICC 2017: 1-4

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