"FPGA area reduction by multi-output function based sequential resynthesis."

Yu Hu et al. (2008)

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DOI: 10.1145/1391469.1391478

access: closed

type: Conference or Workshop Paper

metadata version: 2020-09-30

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Yu Hu, Victor Shih, Rupak Majumdar, Lei He:
FPGA area reduction by multi-output function based sequential resynthesis. DAC 2008: 24-29

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