"Simultaneous Sizing, Reference Voltage and Clamp Voltage Biasing for ..."

Seyedhamidreza Motaman, Swaroop Ghosh (2014)

> Home

Details and statistics

DOI: 10.1145/2593069.2593216

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dac/MotamanG14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dac/MotamanG14
Seyedhamidreza Motaman, Swaroop Ghosh:
Simultaneous Sizing, Reference Voltage and Clamp Voltage Biasing for Robustness, Self-Calibration and Testability of STTRAM Arrays. DAC 2014: 66:1-66:2

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.