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"Dealing with Inductance in High-Speed Chip Design."

Phillip J. Restle, Albert E. Ruehli, Steven G. Walker (1999)

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DOI: 10.1145/309847.310096

access: closed

type: Conference or Workshop Paper

metadata version: 2022-02-25

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  dblp key:
  - conf/dac/RestleRW99
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  - https://dblp.org/rec/conf/dac/RestleRW99
Phillip J. Restle, Albert E. Ruehli, Steven G. Walker:
Dealing with Inductance in High-Speed Chip Design. DAC 1999: 904-909

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