"A methodology for FPGA to structured-ASIC synthesis and verification."

Michael D. Hutton et al. (2006)

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DOI: 10.1109/DATE.2006.243775

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Michael D. Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo:
A methodology for FPGA to structured-ASIC synthesis and verification. DATE Designers' Forum 2006: 64-69

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