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ORCID"Area-Efficient Selective Multi-Threshold CMOS Design Methodology for ..."
Takeshi Kitahara et al. (2005)
- Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa:
Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction. DATE 2005: 646-647
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