"Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS ..."

Alexandru Amaricai et al. (2014)

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DOI: 10.1109/DSD.2014.92

access: closed

type: Conference or Workshop Paper

metadata version: 2024-06-04

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Alexandru Amaricai, Sergiu Nimara, Oana Boncalo, Jiaoyan Chen, Emanuel M. Popovici:
Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits. DSD 2014: 473-479

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