![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
"A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS."
Chih-Hsiang Chang et al. (2013)
- Chih-Hsiang Chang, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng, Nai-Chen Cheng:
A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS. ESSCIRC 2013: 53-56
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.