"A 55nm Ultra Low Leakage Deeply Depleted Channel technology optimized for ..."

Harsh N. Patel et al. (2016)

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DOI: 10.1109/ESSCIRC.2016.7598239

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type: Conference or Workshop Paper

metadata version: 2019-09-25

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Harsh N. Patel, Abhishek Roy, Farah B. Yahya, Ningxi Liu, Benton H. Calhoun, Kazuyuki Kumeno, Makoto Yasuda, Akihiko Harada, Taiji Ema:
A 55nm Ultra Low Leakage Deeply Depleted Channel technology optimized for energy minimization in subthreshold SRAM and logic. ESSCIRC 2016: 45-48

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