"FOSS EKV2.6 Verilog-A Compact MOSFET Model."

Wladek Grabinski et al. (2019)

> Home

Details and statistics

DOI: 10.1109/ESSDERC.2019.8901822

access: closed

type: Conference or Workshop Paper

metadata version: 2025-04-01

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/essderc/GrabinskiAMLBLS19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/essderc/GrabinskiAMLBLS19
Wladek Grabinski, Ahmed Abo-Elhadid, Marek Mierzwinski, Laurent Lemaitre, Mike Brinson, Christophe Lallement, Jean-Michel Sallese, Sadayuki Yoshitomi, Paul Malisse, Henri Oguey, Stefan Cserveny, Marcelo Antonio Pavanello, Christian C. Enz, François Krummenacher, Eric A. Vittoz, Michelly de Souza, Daniel Tomaszewski, Jolanta Malesinska, Grzegorz Gluszko, Matthias Bucher, Nikolaos Makris, Aristeidis Nikolaou:
FOSS EKV2.6 Verilog-A Compact MOSFET Model. ESSDERC 2019: 190-193

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.