"A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning ..."

Ming Ming Wong et al. (2021)

> Home

Details and statistics

DOI: 10.1109/ESSDERC53440.2021.9631786

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/essderc/WongSNMLKJCD21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/essderc/WongSNMLKJCD21
Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, Kevin Tshun Chuan Chai, Anh-Tuan Do:
A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. ESSDERC 2021: 95-98

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.