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"An Efficient Hardware Design for Combined AES and AEGIS."

Amit Sardar, Bijoy Das, Dipanwita Roy Chowdhury (2019)

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DOI: 10.1109/EST.2019.8806225

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-28

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  dblp key:
  - conf/est/SardarDC19
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  - https://dblp.org/rec/conf/est/SardarDC19
Amit Sardar, Bijoy Das, Dipanwita Roy Chowdhury:
An Efficient Hardware Design for Combined AES and AEGIS. EST 2019: 1-6

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