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"A pipelined architecture for DLMS algorithm considering both hardware ..."
Tadaaki Kimijima, Kiyoshi Nishikawa, Hitoshi Kiya (1998)
- Tadaaki Kimijima, Kiyoshi Nishikawa, Hitoshi Kiya:
A pipelined architecture for DLMS algorithm considering both hardware complexity and output latency. EUSIPCO 1998: 1-4

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