"On acceleration of the check tautology logic synthesis algorithm using an ..."

Jason Cong, John Peck (1997)

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DOI: 10.1109/FPGA.1997.624629

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/fccm/CongP97
Jason Cong, John Peck:
On acceleration of the check tautology logic synthesis algorithm using an FPGA-based reconfigurable coprocessor. FCCM 1997: 246-248

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