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"Performance and Area Modeling of Complete FPGA Designs in the presence of ..."

K. R. Shesha Shayee, Joonseok Park, Pedro C. Diniz (2003)

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DOI: 10.1109/FPGA.2003.1227278

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - conf/fccm/ShayeePD03
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  - https://dblp.org/rec/conf/fccm/ShayeePD03
K. R. Shesha Shayee, Joonseok Park, Pedro C. Diniz:
Performance and Area Modeling of Complete FPGA Designs in the presence of Loop Transformations. FCCM 2003: 296

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