"Verification of All Circuits in a Floating-Point Unit Using Word-Level ..."

Yirng-An Chen et al. (1996)

> Home

Details and statistics

DOI: 10.1007/BFB0031797

access: closed

type: Conference or Workshop Paper

metadata version: 2020-11-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fmcad/ChenCHHKKZ96
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fmcad/ChenCHHKKZ96
Yirng-An Chen, Edmund M. Clarke, Pei-Hsin Ho, Yatin Vasant Hoskote, Timothy Kam, Manpreet Khaira, John W. O'Leary, Xudong Zhao:
Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. FMCAD 1996: 19-33

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.