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"Eliminating the memory bottleneck: an FPGA-based solution for 3d reverse ..."

Haohuan Fu, Robert G. Clapp (2011)

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DOI: 10.1145/1950413.1950429

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Haohuan Fu, Robert G. Clapp:
Eliminating the memory bottleneck: an FPGA-based solution for 3d reverse time migration. FPGA 2011: 65-74

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