"Interconnect enhancements for a high-speed PLD architecture."

Michael D. Hutton et al. (2002)

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DOI: 10.1145/503048.503050

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-28

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Michael D. Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh H. Patel, Bruce Pedersen, Jay Schleicher, Sergey Y. Shumarayev:
Interconnect enhancements for a high-speed PLD architecture. FPGA 2002: 3-10

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