"A novel FPGA logic block for improved arithmetic performance."

Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne (2008)

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DOI: 10.1145/1344671.1344698

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-19

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Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne:
A novel FPGA logic block for improved arithmetic performance. FPGA 2008: 171-180

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