"Efficient methodology for detection and correction of SEU-based ..."

E. Syam Sundar Reddy et al. (2005)

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DOI: 10.1145/1046192.1046233

access: closed

type: Conference or Workshop Paper

metadata version: 2020-09-10

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E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan:
Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only). FPGA 2005: 265

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