"Case for Design-Specific Machine Learning in Timing Closure of FPGA Designs."

Que Yanghua et al. (2016)

> Home

Details and statistics

DOI: 10.1145/2847263.2847336

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpga/YanghuaRNTK16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpga/YanghuaRNTK16
Que Yanghua, Chinnakkannu Adaikkala Raj, Harnhua Ng, Kirvy Teo, Nachiket Kapre:
Case for Design-Specific Machine Learning in Timing Closure of FPGA Designs. FPGA 2016: 169-172

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.