"On timing yield improvement for FPGA designs using architectural symmetry ..."

Haile Yu, Qiang Xu, Philip Heng Wai Leong (2011)

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DOI: 10.1145/1950413.1950467

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-19

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Haile Yu, Qiang Xu, Philip Heng Wai Leong:
On timing yield improvement for FPGA designs using architectural symmetry (abstract only). FPGA 2011: 278

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