"3D-PLANE: A 3D-stacked DRAM-based Programmable SLM Accelerator Capable of ..."

Sathwika Bavikadi et al. (2025)

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DOI: 10.1145/3716368.3735285

access: closed

type: Conference or Workshop Paper

metadata version: 2025-07-06

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Sathwika Bavikadi, Purab Ranjan Sutradhar, Jayanth Thangellamudi, Sai Manoj Pudukotai Dinakarrao:
3D-PLANE: A 3D-stacked DRAM-based Programmable SLM Accelerator Capable of Near-Memory and Energy-Efficient Parallel Processing. ACM Great Lakes Symposium on VLSI 2025: 540-546

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