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"Structured Weight Matrices-Based Hardware Accelerators in Deep Neural ..."
Caiwen Ding et al. (2018)
- Caiwen Ding, Ao Ren, Geng Yuan, Xiaolong Ma, Jiayu Li, Ning Liu, Bo Yuan, Yanzhi Wang:
Structured Weight Matrices-Based Hardware Accelerators in Deep Neural Networks: FPGAs and ASICs. ACM Great Lakes Symposium on VLSI 2018: 353-358
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