"Clock Buffer Placement Algorithm for Wire-Delay-Dominated Timing Model."

Masato Edahiro, Richard J. Lipton (1996)

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DOI: 10.1109/GLSV.1996.497610

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Masato Edahiro, Richard J. Lipton:
Clock Buffer Placement Algorithm for Wire-Delay-Dominated Timing Model. Great Lakes Symposium on VLSI 1996: 143-147

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